FPGA Capability
D‑TACQ cards use an advanced Field Programmable Gate Array FPGA for data marshalling. The configuration image for the FPGA is held in local flash memory, allowing for easy in system upgrade. The devices used on the 2G series of cards have sufficient spare capacity to perform significant real time DSP on captured data in real time as it passes through the FPGA. D‑TACQ has implemented a range of standard DSP functions to ship with the data, including
- Event detection
- Digital Filter FIR for use in oversampling applications, brick wall anti alias filter, processing gain, more effective bits example.
- Timestamp functions
- Thresholding and peak detect
In addition, custom processing may be implemented. Typically D‑TACQ will supply a skeleton application to end-user requirement, and the end-user may then choose to complete the design . Examples of custom processing implemented in FPGA include:
- 96 channel digital lock-in amplifier :
synchronous detection brings enormous processing gain.
- 96 channel digital down-converter DDC :
8x data shifting a modulated signal from carrier to baseband.
- Klystron [Microwave] coupler protection system. :
very hard realtime math based protection system, 200+ channels on 16 cards.
The default FPGA devices in use include:
Product |
Device |
Capability |
ACQ216CPCI |
Xilinx V2PRO |
>50% uncommitted gates 28 unit hardware multiplier array uncommitted embedded microprocessor Rocket IO serial transceivers wired to mesh backplane. |
ACQ196CPCI |
Xilinx SPARTAN 3 |
> 50% uncommitted gates 16 unit hardware multiplier array. |
ACQ132CPCI |
Xilinx SPARTAN 3A |
9 devices fitted, large uncommitted resource. |
ACQ164CPCI |
Xilinx SPARTAN 3A |
1 device, limited DSP capability. |
Even larger devices may be fitted at time of build on request, please contact D‑TACQ for details. |